Productivity
and Quality for
all Chip Designs.
Why is full-chip electrical verification essential?
100% exhaustive and accurate
- Detects all errors thanks to an electrically-accurate analysis at transistor-level on the full IC
- Built from the ground up to remove the burden of false errors
- Covers all possible power states in a single run
- Enables focusing on correcting real errors rather than filtering out false errors
Easy to use for all IC designers
- Minimizes setup effort thanks to Aniah’s smart analysis algorithm
- Provides the benefits of formal verification at transistor level to analog and digital design engineers
- Efficient results analysis interface including seamless integration with design tools for cross-probing
Unique error detection capacity
Our error detection capacity is unparalleled by both Spice and static ERC :
- Conditional High-Impedance in large-scale VLSI, including non-systematic errors
- Reliability and electrical overstress errors in ICs with complex HV/LV voltages mix
- Detection capacity is independent of IC scale – up to one billion of transistors

Mourad Djouder
at STMicroelectronics.
About us
A smart circuit analysis algorithm to unleash the potential of vectorless static transistor-level verification
Founded in
2019
in Q4
Total funding
9.8 M€
in 2024, Q4
Team
16 people
and growing!
International
3 agencies
France, Taiwan, USA
Our stories
Aniah’s AI-driven Electrical Verification Platform Adopted by Elmos
Aniah’s AI-driven Electrical Verification Platform Adopted by Elmos, a leading Automotive Semiconductor Company to Accelerate Next-Generation Automotive Chip Design (Grenoble, France) - June 2026 - Aniah, a next-generation provider of advanced electrical...
First place at the IC Taiwan Grand Challenge – AI Core Technologies & Chips Category
With its new solution, Amigo.IA, Aniah won first prize in its category at the IC Taiwan Grand Challenge, the prestigious competition organized by Taiwan's National Science and Technology Council (NSTC). The 2026 edition of the challenge aims to identify the world's...
Context is everything Why AI. For Analog Design Requires more than your netlist
Large Language Models are transforming Electronic Design Automation, but feeding a raw netlist to an AI model cannot deliver reliable verification results. A netlist describes what is connected, not why. Design intent, power domains, operating modes, and system...